Control device for secondary storage assuring transmission bandw

Details Control device for secondary storage assuring transmission bandw Control device for secondary storage assuring transmission bandw

1995-10-13

1998-07-07

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

395845, 395826, G06F 1316

Patent

active

057784450

ABSTRACT:
In a memory, a program for internal control such as temperature compensation and calibration of a disk device and a program for scheduling the transfer timing and transfer size and effecting the control of data stream transfer between a computer and the disk device according to the scheduling are stored as firmware. A CPU controls a timer interrupting section, disk interface driver and internal interface driver according to the program to attain the internal control of the disk device and data transfer between the computer and the disk device. The timer interrupting section permits data transfer according to the scheduling by previously setting the interrupting timing by the CPU and generating an interruption according to the thus set timing.

REFERENCES:
patent: 5280587 (1994-01-01), Shimodaira et al.
patent: 5461611 (1995-10-01), Drake, Jr. et al.
patent: 5581703 (1996-12-01), Baugher et al.
patent: 5598395 (1997-01-01), Watanabe
patent: 5630112 (1997-05-01), Yoshida et al.

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