Control device for controlling a connection between an arithmeti

Details Control device for controlling a connection between an arithmeti Control device for controlling a connection between an arithmeti

1996-08-28

1998-06-02

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

711 1, G06F 1316

Patent

active

057617309

ABSTRACT:
A control device is provided that controls a connection between a specific one of a plurality of arithmetic processors and a specific one of a plurality of main memory units in accordance with an access request supplied from the specific arithmetic processor. The access request has request tag information. A buffer section buffers the request tag information in response to a write-in address. A supplying section supplies the specific main memory unit with an additional access request having the write-in address as an identifier instead of the request tag information. When the specific main memory access ends, the specific memory unit supplies the control device with a reply signal having the identifier as a reply identifier. A read section reads the request tag information out of the buffer section in accordance with the reply identifier. The request tag information is delivered from the control device to the specific arithmetic processor.

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C. Chin and W. Lin "A Massively Parallel Processing System Based on a Hyper-Crossbar Network," The 2nd Symposium on the Frontiers of Massively Parallel Computation, Oct. 10-12, 1988, pp. 463-466.

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