Control data transfer rates for a serial ATA device by...

Details Control data transfer rates for a serial ATA device by... Control data transfer rates for a serial ATA device by...

2007-12-20

2010-06-29

Peyton, Tammara (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output process timing

C710S025000, C710S029000, C710S033000, C710S316000, C713S400000, C713S502000, C702S106000, C702S108000

Reexamination Certificate

active

07747796

ABSTRACT:
Systems and methods for performing data transfer rate throttling o improve the effective data transfer rate for SATA storage devices. The data transfer rate is diluted by inserting ALIGN primitives when data is sent. The receiving device simply discards the ALIGN primitives. Therefore, the receive data FIFO does not fill as quickly and fewer flow control sequences are needed for flow control to prevent the receive data FIFO from overflowing. An advantage of using the ALIGN primitives instead of conventional flow control is that the round-trip handshake latency is not incurred to disable and later enable data transfers.

REFERENCES:
patent: 7272527 (2007-09-01), Suto et al.
patent: 7356555 (2008-04-01), Bedwani et al.
patent: 7360010 (2008-04-01), Ghaffari et al.
patent: 7373541 (2008-05-01), Stenfort et al.
patent: 7406652 (2008-07-01), Tseng et al.
patent: 7496700 (2009-02-01), Chong et al.

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