Control circuit for EEPROM

Static information storage and retrieval – Read/write circuit – Erase

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Details

36518901, 36523001, G11C 1300

Patent

active

051013819

ABSTRACT:
A control circuit generating a write/erase high voltage pulse for an EEPROM is disclosed. The control circuit comprises a low frequency clock pulse oscillation circuit, a voltage booster circuit having at least 19 FET booster stages and a high voltage shaping switch circuit having an exponential rising pulse edge driven by the clock pulse.

REFERENCES:
patent: 4648076 (1987-03-01), Schrenk
patent: 4805151 (1989-02-01), Terada et al.
patent: 4907202 (1990-03-01), Kouzi
patent: 4977543 (1990-12-01), Kouzi

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