Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-12-05
2006-12-05
Rinehart, Mark H. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S106000, C710S110000
Reexamination Certificate
active
07146450
ABSTRACT:
A parent station output section changes a duty factor between a period in which a control data signal is at a level (high-potential low-level) lower than a power supply voltage Vx but higher than high-level signal in other circuit portions and a subsequent period in which the control data signal is at the power supply voltage Vx level to convert the control data signal into a serial pulse voltage signal and output the voltage signal onto data signal lines D+ and D− in accordance with each data value in the control data signal inputted from a controller in each cycle of a clock.
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Mori Yasushi
Nishikido Kenji
Saitou Yoshitane
Yukawa Kouji
Anywire Corporation
McGlew & Tuttle PC
Phan Raymond N
Rinehart Mark H.
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