Static information storage and retrieval – Addressing – Byte or page addressing
Patent
1995-04-19
1996-12-03
Nguyen, Tan T.
Static information storage and retrieval
Addressing
Byte or page addressing
36518901, 365 49, G11C 700
Patent
active
055815138
ABSTRACT:
A random access memory 200 is provided which includes input/output circuitry 205 and an array 202 of random access memory cells 201 arranged in rows and columns. Row decoder circuitry 206 is provided for selecting in response to a row address a row of cells in array 202 for access. Column control circuitry 207, 208 is included for controlling access to locations along the selected row, each location comprising at least one memory cell 201. The column control circuitry 207, 208 is operable to sequentially access a first plurality of locations along the selected row through input/output circuitry 205 and simultaneously access a second plurality of locations along the selected row. Auxiliary memory circuitry 209 is included for interfacing exchanges of data between the second plurality of locations and input/output circuitry 205, auxiliary memory circuitry 209 exchanging words with corresponding ones of the second plurality of locations in array 202 in parallel and with input/output circuitry 205 in serial.
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patent: 4635232 (1987-01-01), Iwahashi et al.
patent: 5245585 (1993-09-01), Voss
patent: 5402377 (1995-03-01), Ohhata et al.
patent: 5473566 (1995-12-01), Rao
Cirrus Logic Inc.
Nguyen Tan T.
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