Continuous monitor for interrupt latency in real time systems

Details Continuous monitor for interrupt latency in real time systems Continuous monitor for interrupt latency in real time systems

1997-09-10

1999-08-31

Beausoliel, Jr., Robert W.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

714 37, 714 42, 714 20, 714 55, G06F 1100

Patent

active

059448407

ABSTRACT:
Apparatus and a method for monitoring the time for a computer to process a process associated with an interrupt asserted on a system bus. When the interrupt is asserted, a time stamp value and data associated with the interrupt are stored in one of a plurality of registers. The data associated with the interrupt include an identification of the type of interrupt, the bus, and a device asserting the interrupt. Whenever a time stamp value and associated data are stored in a register, a flag is set ON to indicate information is stored therein. The time stamp value and associated data are stored in an overflow register if every other register is in use. A latency value for the interrupt is determined from the difference between the time stamp value stored in a register and the time when processing of the interrupt process is complete. Interrupts that are asserted by various devices on a plurality of different buses can be monitored, and the latency values and associated data for each interrupt can be determined and stored. A report showing the latency times for the different interrupts can be produced. In addition, an alarm can be produced if the latency time for any interrupt exceeds a predetermined maximum value.

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Rolf Oestergaard, "Watchdogs for Interrupt Monitoring", Dr. Dobb's Journal, pp. 60-68, Jun. 1997.
Oestergaard, Rolf V., Watchdogs For Interrupt Monitoring, Dr. Dobb's Journal, Jun. 1997, 5 pp.

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