Context save and restore with a stack-based memory structure

Details Context save and restore with a stack-based memory structure Context save and restore with a stack-based memory structure

2005-07-25

2009-10-20

Thai, Tuan V. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S100000, C711S118000, C711S129000, C711S154000

Reexamination Certificate

active

07606977

ABSTRACT:
A multi-threaded processor adapted to couple to external memory comprises a controller and data storage operated by the controller. The data storage comprises a first portion and a second portion, and wherein only one of the first or second portions is active at a time, the non-active portion being unusable. When the active portion does not have sufficient capacity for additional data to be stored therein, the other portion becomes the active portion. Upon a thread switch from a first thread to a second thread, only one of the first or second portions is cleaned to the external memory if one of the first or second portions does not contain valid data.

REFERENCES:
patent: 6604168 (2003-08-01), Ogawa
patent: 6772310 (2004-08-01), Thompson et al.
patent: 6915307 (2005-07-01), Mattis et al.
patent: 6988167 (2006-01-01), Allen et al.
patent: 7032158 (2006-04-01), Alvarez et al.
patent: 7065613 (2006-06-01), Flake et al.
patent: 7200721 (2007-04-01), Lang et al.

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