Content addressable memory having memory cells storing don't car

Details Content addressable memory having memory cells storing don't car Content addressable memory having memory cells storing don't car

1997-07-01

1999-03-30

Gossage, Glenn

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

365 49, 711202, 711207, G06F 1200, G11C 1500

Patent

active

058902015

ABSTRACT:
A method of accessing a content addressable memory storing two bits of information representing either an invalid state, a logic zero state, a logic one state, or a don't care state, is disclosed. The stored information is compared with a one bit signal. A match is indicated when the one bit signal represents a logic zero and the stored information represents the don't care state, or when the one bit signal represents a logic one and the stored information represents a don't care state. An absence of a match is indicated when the one bit signal represents a logic zero and the stored information represents an invalid state, or when the one bit signal represents a logic one and the stored information represents the invalid state. The content addressable memory is especially adapted for use in a translation buffer providing variable page granularity. The don't care state permits multiple virtual page numbers to match a single entry storing information for multiple physical pages. The invalid state eliminates the need for a dedicated valid bit in each entry.

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