Content addressable memory device for compensating faults

Static information storage and retrieval – Associative memories – Ferroelectric cell

Reexamination Certificate

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C365S189080, C365S200000

Reexamination Certificate

active

06839259

ABSTRACT:
A content addressable memory device includes a plurality of memory banks. A faulty memory bank, if present, is excluded from the memory capacity thereof so that the content addressable memory device is used with the memory capacity thereof reduced. The content addressable memory device includes a plurality of banks, each bank including a plurality of words for storing data, an excluded bank information memory for storing information concerning an excluded bank, a mapping circuit for mapping an enable signal designating a bank to a bank other than the excluded bank, based on the excluded bank information, and a demapping circuit for mapping, to bank addresses including the address of the excluded bank, a hit signal representing that a word storing data corresponding to input search data is present in its own bank.

REFERENCES:
patent: 20030227801 (2003-12-01), Battaglia
patent: 20040085825 (2004-05-01), Narita et al.
patent: 2000-030487 (2000-01-01), None
A 1-Mb 2-TR/b Nonvolatile CAM Based on Flash Memory Technologies, Tohru Miwa, Hachiro Yamada, Yoshinori Hirota, Toshiya Satoh, and Hideki Hara, 1996 IEEE.

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