Content addressable memory (CAM) device decoder circuit

Details Content addressable memory (CAM) device decoder circuit Content addressable memory (CAM) device decoder circuit

2005-06-07

2005-06-07

Le, Thong Q. (Department: 2818)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C365S230060, C365S186000

Reexamination Certificate

active

06903951

ABSTRACT:
A decoder circuit (100) is disclosed that may include “string” decoders (102-0and102-1), a compare circuit (104) and an enable circuit (106). String decoders (102-0and102-1) may provide “one-hot” or “string” decoding. One-hot decoding may activate one pre-decode signal. String decoding may activate one or more pre-decode signals. A compare circuit (104) may receive at least two pre-decode signals from one string decoder (102-1) and compare such values to generate a comparison result CMP. An enable circuit may generate decoder output signals (DEC0-DEC(n−1)) according to a comparison result CMP.

REFERENCES:
patent: 5369621 (1994-11-01), Mason
patent: 5440753 (1995-08-01), Hou et al.
patent: 5668772 (1997-09-01), Hotta
patent: 5829009 (1998-10-01), Frazier
patent: 6205530 (2001-03-01), Kang

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