Content addressable memory array system with multiplexed status

Details Content addressable memory array system with multiplexed status Content addressable memory array system with multiplexed status

1988-05-11

1989-12-19

Fears, Terrell W.

Static information storage and retrieval

Associative memories

Ferroelectric cell

36518901, 36523004, G11C 1300, G11C 1500

Patent

active

048887315

ABSTRACT:
A content addressable memory system includes an array of memory cells arranged in rows and columns in an array of N bit cells by M words, with N bits per word, an I/O bus having a bit capacity S which is a submultiple of N, a mode generator for generating a plurality of commands, the commands including a command write command, a data write command, a data read command, and a status read command, the command write and the status read commands being encodable in S bits or less, and multiplexing means for supplying selected ones of the commands to the I/O bus.

REFERENCES:
patent: 4310901 (1982-01-01), Harding et al.

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