Data processing: structural design – modeling – simulation – and em – Modeling by mathematical expression
Patent
1998-06-22
2000-05-30
Teska, Kevin J.
Data processing: structural design, modeling, simulation, and em
Modeling by mathematical expression
703 5, G06F 1710, G06F 1750
Patent
active
06068660&
ABSTRACT:
A method and apparatus for calculating parasitic capacitance between conductors of an integrated circuit. A physical structure which includes a conductive wire within an integrated circuit is considered. Limiting cases of the structure are then selected to simplify the derivation of an accurate parasitic capacitance expression. The limiting cases are simplified and structural variables may be combined, so as to reduce the data set necessary to extract or interpolate an expression for calculating the parasitic capacitance for each of the limiting cases. A second set of limiting cases, representing simplified physical structures, is then chosen. Again, simplification techniques are used to simplify each of the original limiting cases. The is simplified limiting case expressions are combined to derive a more generalized relationship where capacitance is a function of a reduced number of parameters. From this relationship, an interpolation may be used to produce a mathematical formula which may be used to calculate parasitic capacitance for more generalized structures.
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International Business Machines - Corporation
Knox Lonnie A.
Schnurmann H. Daniel
Teska Kevin J.
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