Static information storage and retrieval – Associative memories – Ferroelectric cell
Utility Patent
2000-05-12
2001-01-02
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Associative memories
Ferroelectric cell
C365S189070
Utility Patent
active
06169685
ABSTRACT:
This invention relates to the memory devices produced as an integrated circuit and more particularly a content addressable, or associative memory.
These memories are generally referred to by the acronym CAM from the initial letters of the words “Content(s) Addressable Memory” and will be referred to as such in the description that follows.
BACKGROUND OF THE INVENTION
CAM memories are currently used in many applications requiring search inside a database. Briefly, a CAM memory includes a matrix of memory cells each storing one data word bit and is associated with a comparator. The memory receives the data (comparand) to be searched from a user device and the comparator performs a bit-to-bit comparison between the comparand and the words stored. In the event of a positive match (that is to say the item searched is actually found to be present in the memory), the user device is given the address where the item is stored, together with any additional data present. In many applications, the information read from the memory is later used for direct access to a second memory structure. A feature of these memories is that they compare input data with all the items they contain in one clock signal cycle, and make the search potentially faster than with conventional random access memories that would require several comparison cycles.
One CAM application that is becoming increasingly interesting for telecommunications is the creation of routing tables inside high speed web nodes, such as ATM, Internet and like nodes, in which where packages with headers containing package destination data are transmitted. At message receipt, web node routing management tools use all or part of this address to search a table and retrieve the output interface to which the package is to be forwarded for transmission to a subsequent web body.
In the literature several commercially available CAM memories are described, such as in U.S. Pat. Nos. 5,383,146, 5,469,378, 5,495,382, 5,841,874. Among the memories, it is known the MUSIC Semiconductors Inc. component, named MU9C2480A LANCAM®.
All these devices are produced as autonomous integrated circuits separate from any memory user device integrated circuit.
Today's more advanced technical solutions are oriented at manufacturing complex equipment such as Internet or ATM node routers on one integrated circuit. Given this trend, it would be advisable for the CAM memory too to be incorporated into the same integrated circuit containing the user device to prevent access to external memories. This makes device operations faster, simplifies its overall structure by eliminating pins and connections and reduces overall consumption.
Incorporating the CAM memory into the same circuit containing the user device as well therefore imposes constraints to the physical dimensions of the memory and thus its capacity. Possible greater exploitation of storage capacity is offered by ternary memories where word bits can have an indifferent (don't care) logical value besides the logical values of 0, 1. Assigning an indifferent logical value to word bit groups permits the reduction of the number of words to be actually stored. U.S. Pat. No. 5,841,874 describes an example of ternary CAM memory.
Another issue to be borne in mind is that an item read in a CAM memory is often an address or an access pointer to a further RAM or direct access type data structure. The interest in having the same integrated circuit contain both the data structure to be used as a CAM search memory and the RAM structure is obvious. U.S. Pat. No. 5,383,146, also used in the MU9C2480A LANCAM® component mentioned above, describes a CAM memory programmable so as to disable comparators associated to bit groups of each word stored and have part of each word characterised as CAM and the remaining part as RAM. The option of operating as a ternary memory is not provided, nor the possibility of incorporating the memory into the same integrated circuit the user device is made of. Furthermore, programmability concerns bit groups totalling no less than a certain number (groups of 8 bits particularly). U.S. Pat. No. 5,841,874 mentioned above describes the possibility of associating a ternary memory with a RAM memory addressable by signals obtained as the result of CAM search on the same integrated circuit, but the memory area useable as RAM contains data separate from those stored in CAM.
The purpose of this invention is to supply a ternary CAM memory designable as an integrated circuit library cell capable of being incorporated into a user device. Special attention must be given to memory power consumption in these conditions and the memory described in the invention presents interesting solutions from this standpoint.
Another advantageous feature of the invention is that the memory is such that it is possible to configure fractions useable as ternary CAM, binary CAM or RAM, according to need.
SUMMARY OF THE INVENTION
The memory of the invention includes:
at least one memory cell matrix organized to form an array of M data words of N bits each, where each bit is stored in one cell;
means for presenting to the matrix or matrices a data word to search in the memory by comparing it with a mask word, such presentation means being connected to the matrix cells by lines for bits shared by all the cells of one column;
comparison means associated with each cell for comparison between a comparand bit and the bit stored in the cell, the outputs of such comparison means associated to the cells of each line being combined with one another to generate positive or negative outcome signals of the comparison completed in the line cells;
encoding means connected to the match lines and able to emit signals indicating whether or not matches were found between the comparand and stored words, and in the affirmative, whether a match was found with one or more words stored; and
means for checking access to the matrix for execution of a search or for writing/reading data by direct addressing.
and is characterised by the fact that According to the invention the entire array of words stored in the memory matrix is a data structure accessible by direct addressing, the address being supplied by a user device or consisting of the signal emitted by encoding means to indicate that a match was found between the comparand and one word stored.
The memory matrix contains a supplementary line of cells, allocated to storing dummy data and organized so that comparison with a comparand always gives a positive comparison signal on a dummy match line, and a supplementary column of cells not allocated to memory data and containing a cell corresponding to said supplementary line. The encoding means contains a supplementary section connected to the supplementary memory matrix line outputting a dummy address signal.
During direct address memory operation, the control means can always address said supplementary line too.
The memory matrix supplementary line with the supplementary section of the encoding means, and a first control means unit form an initial resetting loop used during memory operation to execute comparisons between a comparand and the data stored to check said first control means unit in such as way as to disable said presentation means as soon as a comparand and its mask are presented to the memory matrix. The supplementary line and column create a resetting signal together with the generation unit. The control means is part of a second resetting loop used during memory operation to control the control means in such a way as to disable data addressing and reading means as soon as data have been read.
REFERENCES:
patent: 5107501 (1992-04-01), Zorian
patent: 5130947 (1992-07-01), Reed
patent: 5226005 (1993-07-01), Lee et al.
Gandini Marco
Torielli Alessandro
Turolla Maura
Cselt-Centro Studi e Laboratori Telecomuicazioni S.p.A.
Dinh Son T.
Dubno Herbert
Nguyen Tuan T.
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