Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-02-18
1999-09-28
Hua, Ly
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 8, 365200, 36523003, 365189, G11C 1140
Patent
active
059580658
ABSTRACT:
A method of storing data to a defective memory device includes first receiving a memory address and a plurality of data bits. Next, a content addressable memory is interrogated with the memory address. Then, at least one data bit of the plurality of data bits is stored in the defective memory device. If the memory address is found in the content addressable memory, then at least one data bit of the plurality of data bits is stored in the content addressable memory.
REFERENCES:
patent: 3633175 (1972-01-01), Harper
patent: 4376300 (1983-03-01), Tsang
patent: 5091851 (1992-02-01), Shelton et al.
patent: 5278793 (1994-01-01), Yeh
patent: 5719804 (1998-02-01), Higaki
Hua Ly
Micron Electronics Inc.
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