Contemporaneous margin verification and memory access for...

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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C365S189070

Reexamination Certificate

active

07830701

ABSTRACT:
Circuitry and methods for restoring data values in non-volatile memory are disclosed. An integrated circuit includes a memory access circuit and a sensing circuit configured to sense a data signal during a read operation to at least one two-terminal non-volatile cross-point memory array. Each memory array includes a plurality of two-terminal memory cells. A plurality of the memory arrays can be fabricated over the substrate and vertically stacked on one another. Further, the integrated circuit can include a margin manager circuit configured to manage a read margin for the two-terminal memory cells substantially during the read operation, thereby providing for contemporaneous read and margin determination operations. Stored data read from the two-terminal memory cells may have a value of the stored data restored (e.g., re-written to the same cell or another cell) if the value is not associated with a read margin (e.g., a hard programmed or hard erased state).

REFERENCES:
patent: 5359205 (1994-10-01), Ovshinsky
patent: 6317375 (2001-11-01), Perner
patent: 6331944 (2001-12-01), Monsma et al.
patent: 6504221 (2003-01-01), Tran et al.
patent: 6608773 (2003-08-01), Lowrey et al.
patent: 6667900 (2003-12-01), Lowrey et al.
patent: 6707712 (2004-03-01), Lowery
patent: 6717874 (2004-04-01), Perner et al.
patent: 6751147 (2004-06-01), Smith et al.
patent: 6754107 (2004-06-01), Khouri et al.
patent: 6813177 (2004-11-01), Lowrey et al.
patent: 6826094 (2004-11-01), Perner et al.
patent: 6836422 (2004-12-01), Perner et al.
patent: 6847544 (2005-01-01), Smith et al.
patent: 6865104 (2005-03-01), Perner
patent: 6885573 (2005-04-01), Sharma et al.
patent: 6894938 (2005-05-01), Smith et al.
patent: 6898134 (2005-05-01), Smith et al.
patent: 6940744 (2005-09-01), Rinerson et al.
patent: 6999366 (2006-02-01), Perner et al.
patent: 7020006 (2006-03-01), Chevallier et al.
patent: 7038948 (2006-05-01), Hamilton et al.
patent: 7042757 (2006-05-01), Perner
patent: 7046043 (2006-05-01), Shibata et al.
patent: 7057258 (2006-06-01), Tran et al.
patent: 7068204 (2006-06-01), Bathul et al.
patent: 7075817 (2006-07-01), Rinerson et al.
patent: 7079436 (2006-07-01), Perner et al.
patent: 7102948 (2006-09-01), Perner
patent: 7164599 (2007-01-01), Hosotani et al.
patent: 7372753 (2008-05-01), Rinerson et al.
patent: 7379364 (2008-05-01), Siau et al.
patent: 7706167 (2010-04-01), Toda et al.
patent: 2003/0058728 (2003-03-01), Tran et al.
patent: 2003/0103400 (2003-06-01), Tran et al.
patent: 2004/0125653 (2004-07-01), Tran et al.
patent: 2004/0160797 (2004-08-01), Tran et al.
patent: 2006/0034124 (2006-02-01), Guterman et al.
patent: 2006/0039191 (2006-02-01), Perner et al.
patent: 2006/0044878 (2006-03-01), Perner et al.
patent: 2006/0050551 (2006-03-01), Perner
patent: 2006/0050552 (2006-03-01), Perner et al.
patent: 2006/0050582 (2006-03-01), Perner et al.
patent: 2007/0159904 (2007-07-01), Tran et al.
patent: 2007/0285971 (2007-12-01), Toda et al.
patent: 2008/0025079 (2008-01-01), Philipp et al.
patent: 2008/0144357 (2008-06-01), Siau et al.
patent: 2008/0159046 (2008-07-01), Rinerson et al.
U.S. Appl. No. 12/332,136, filed Jul. 31, 2008, Chevallier et al.
U.S. Appl. No. 12/001,952, filed Dec. 12, 2007, Norman.
Noboru Sakimura, et al, “A 512Kb Cross-Point Cell MRAM”, IEEE International Solid-State Circuits Conference, 2003, paper 16.1.
U.S. Appl. No. 12/221,136, filed Jul. 31, 2008, Chevallier et al.

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