Contactless nonvolatile semiconductor memory device having burie

Details Contactless nonvolatile semiconductor memory device having burie Contactless nonvolatile semiconductor memory device having burie

1997-09-29

2000-05-02

Jackson, Jr., Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257321, 257330, 257332, H01L 29788

Patent

active

060575743

ABSTRACT:
In a contactless nonvolatile semiconductor memory device including a semiconductor substrate and a plurality of impurity diffusion layers of a rectangular shape serving as sub bit lines on the semiconductor substrate, a plurality of grooves of a rectangular shape are formed in the semiconductor substrate between the impurity diffusion layers. Also, a first gate insulating layer is formed on the semiconductor substrate within the grooves, and a plurality of floating gate electrodes are formed on the gate insulating layer. Further, a second gate insulating layer is formed on the floating gate electrodes, and a plurality of word lines are formed on the second gate insulating layer.

REFERENCES:
patent: Re35810 (1998-05-01), Prall
patent: 5534456 (1996-07-01), Yuan et al.
patent: 5773343 (1998-06-01), Lee et al.
patent: 5854501 (1998-12-01), Kao
J. Esquivel, et al., "High density contactless, self aligned EPROM cell array technology", pp. 592-595, IEDM Technical Digest, 1986.

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