Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1995-06-14
1997-08-26
Niebling, John
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438763, 438958, H01L 2128
Patent
active
056610793
ABSTRACT:
The invention relates to a method for contacting SIPOS-passivated semiconductor zones on a semiconductor body, where the removal of the oxide layer from the wafer surface takes place at the same time as the oxide etching before SIPOS passivation. The double-layered SIPOS passivation consists here of a N-SIPOS layer and a O-SIPOS layer. For contact opening, only the N-SIPOS layer is removed by wet chemical etching. By annealing the previously vaporized and structured metallization, a good contact results which can also carry a high current. The process according to the invention involves a simple sequence of operations and an underetching of the passivation layers and the disadvantages resulting from this are reliably avoided.
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Harmel Hartmut
Kellner-Werdehausen Uwe
Bilodeau Thomas G.
Niebling John
TEMIC Telefunken microelectronic GmbH
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