Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Groove
Patent
1999-08-19
2000-08-08
Clark, Sheila V.
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
Groove
257626, H01L 3900
Patent
active
061005770
ABSTRACT:
A method is disclosed for forming Y-shaped holes in semiconductor substrates by using Y-contact etching. The hole is formed with a single, two-step dry-etching process in a single chamber with one masking step for the whole hole. The upper portion of the Y-shaped hole is formed by means of an isotropic tapered dry-etching process while the lower portion is formed by means of a straight anisotropic recipe of the same dry-etching process. The result is a Y-shaped hole formed with fewer process steps and with maximized contact area for improved reliability.
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Ackerman Stephen B.
Clark Sheila V.
Saile George O.
Vanguard International Semiconductor Corporation
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