Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-10-16
2007-10-16
Sarkar, Asok K. (Department: 2891)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S597000, C438S667000, C438S672000, C438S675000, C257SE21585
Reexamination Certificate
active
11598709
ABSTRACT:
A method of forming a contact hole of a semiconductor device, the method comprising: forming a gate line and a source/drain region in a substrate; depositing an etch stopper layer on the substrate; depositing a first interlayer dielectric layer on the etch stopper layer and flattening the first interlayer dielectric layer exposing a portion of the etch stopper layer; removing the exposed portion of the etch stopper layer; forming a gate protective layer on the gate line; depositing a second interlayer dielectric layer on the substrate; and etching the second interlayer dielectric layer to form a first contact hole on the gate line and etching the second interlayer dielectric layer, the first interlayer dielectric layer, and the etch stopper layer to form a second contact hole on the source/drain region, wherein the gate protective layer protects the gate line during the formation of the first and second contact holes.
REFERENCES:
patent: 2002/0155699 (2002-10-01), Ueda
patent: 2005/0180217 (2005-08-01), Ding
patent: 2005/0201155 (2005-09-01), Shih
patent: 2006/0202340 (2006-09-01), Park et al.
Dongbu Electronics Co. Ltd.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Sarkar Asok K.
Yevsikov Victor V.
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