Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2011-01-25
2011-01-25
Patel, Hetul (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711SE12068, C711SE12039, C345S537000, C345S557000
Reexamination Certificate
active
07877565
ABSTRACT:
Systems and methods for using multiple versions of programmable constants within a multi-threaded processor allow a programmable constant to be changed before a program using the constants has completed execution. Processing performance may be improved since programs using different values for a programmable constant may execute simultaneously. The programmable constants are stored in a constant buffer and an entry of a constant buffer table is bound to the constant buffer. When a programmable constant is changed it is copied to an entry in a page pool and address translation for the page pool is updated to correspond to the old version (copy) of the programmable constant. An advantage is that the constant buffer stores the newest version of the programmable constant.
REFERENCES:
patent: 5274811 (1993-12-01), Borg et al.
patent: 5821940 (1998-10-01), Morgan et al.
patent: 5958028 (1999-09-01), Bean et al.
patent: 6088044 (2000-07-01), Kwok et al.
patent: 6141732 (2000-10-01), Adams
patent: 6268874 (2001-07-01), Niu et al.
patent: 6289432 (2001-09-01), Ault et al.
patent: 6339813 (2002-01-01), Smith et al.
patent: 6483505 (2002-11-01), Morein et al.
patent: 6943800 (2005-09-01), Taylor et al.
patent: 6963345 (2005-11-01), Boyd et al.
patent: 6980209 (2005-12-01), Donham et al.
patent: 7103720 (2006-09-01), Moy et al.
patent: 7136488 (2006-11-01), Hashimoto et al.
patent: 7653895 (2010-01-01), James-Roxby et al.
patent: 7669015 (2010-02-01), Dice et al.
patent: 2002/0101995 (2002-08-01), Hashimoto et al.
patent: 2003/0020709 (2003-01-01), Naegle et al.
patent: 2003/0112742 (2003-06-01), Piper et al.
patent: 2003/0197707 (2003-10-01), Dawson
patent: 2004/0207630 (2004-10-01), Moreton et al.
patent: 2005/0041037 (2005-02-01), Dawson
patent: 2005/0071601 (2005-03-01), Luick
patent: 2005/0162437 (2005-07-01), Morein et al.
patent: 2005/0243094 (2005-11-01), Patel et al.
patent: 2005/0256976 (2005-11-01), Susairaj et al.
patent: 2009/0248381 (2009-10-01), Liu et al.
Eggers, et al. “Simultaneous Multithreading: A Platform for Next-Generation Processors,”IEEE Micro, vol. 17, No. 5, pp. 12-19, Sep./Oct. 1997.
Final Office Action, U.S. Appl. No. 11/344,306, dated Aug. 19, 2009.
Office Action, U.S. Appl. No. 11/344,306, dated Mar. 30, 2010.
Office Action, U.S. Appl. No. 11/344,306 dated Sep. 14, 2010.
Allen Roger L.
Everitt Cass W.
Kong Thomas H.
Moreton Henry Packard
Moy Simon S.
Nvidia Corporation
Patel Hetul
Patterson & Sheridan LLP
LandOfFree
Constant versioning for multi-threaded processing does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Constant versioning for multi-threaded processing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Constant versioning for multi-threaded processing will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2623946