Considering mask writer properties during the optical...

Details Considering mask writer properties during the optical... Considering mask writer properties during the optical...

2002-08-30

2004-09-14

Smith, Matthew (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06792592

ABSTRACT:

BACKGROUND
1. Field of the Invention
The invention relates to the process of fabricating semiconductor chips. More specifically, the invention relates to a method and an apparatus that considers mask writer properties during an optical proximity correction (OPC) process, wherein the OPC process generates corrections for a layout of an integrated circuit so that the layout prints more accurately on a semiconductor chip.
2. Related Art
Recent advances in integrated circuit technology have largely been accomplished by decreasing the feature size of circuit elements on a semiconductor chip. As the feature size of these circuit elements continues to decrease, circuit designers are forced to deal with problems that arise as a consequence of the optical lithography process that is typically used to manufacture the integrated circuits. This optical lithography process begins with the formation of a photoresist layer on the surface of a semiconductor wafer. A mask composed of opaque regions, which are formed of chrome, and light-transmissive clear regions, which are generally formed of quartz, is then positioned over this photo resist layer coated wafer. (Note that the term “mask” as used in this specification is meant to include the term “reticle.”) Light is then shone on the mask from a visible light source, an ultraviolet light source, or more generally some other type of electromagnetic radiation, together with suitably adapted masks and lithography equipment.
This light is reduced and focused through an optical system that contains a number of lenses, filters and mirrors. The light passes through the clear regions of the mask and exposes the underlying photoresist layer. At the same time, the light is blocked by opaque regions of the mask, leaving underlying portions of the photoresist layer unexposed.
The exposed photoresist layer is then developed, through chemical removal of either the exposed or non-exposed regions of the photoresist layer. The end result is a semiconductor wafer with a photoresist layer having a desired pattern. This pattern can then be used for etching underlying regions of the wafer.
One problem that arises during the optical lithography process is “line end shortening” and “pullback.” For example, the upper portion of
FIG. 1
illustrates a design of a transistor with a polysilicon line
102
, running from left to right, that forms a gate region used to electrically couple an upper diffusion region with a lower diffusion region. The lower portion of
FIG. 1
illustrates a printed image that results from the design.
Also note that because of optical effects and resist pullback there is a significant amount of line end shortening. This line end shortening is due to optical effects that cause the light to expose more of the resist under a line end than under other portions of the line.
In order to compensate for line end shortening, designers often add additional features, such as “hammer heads,” onto line ends (see top portion of FIG.
2
). The upper portion of
FIG. 2
illustrates a transistor with a polysilicon line
202
, running from left to right, which forms a gate region used to electrically couple an upper diffusion region with a lower diffusion region. A hammer head
204
is included on each end of polysilicon line
202
to compensate for the line end shortening. As is illustrated in the bottom portion of
FIG. 2
, these additional features can effectively compensate for line end shortening in some situations.
These additional features are typically added to a layout automatically during a process known as optical proximity correction (OPC). For example,
FIG. 3
illustrates line end geometry
302
(solid line) prior to OPC and the resulting corrected line end geometry
304
after OPC (dashed line). Note that the corrected line end geometry
304
includes regions with a positive edge bias in which the size of the original geometry
302
is increased, as well as regions of negative edge bias in which the size of the original geometry
302
is decreased.
Unfortunately, current OPC techniques do not consider the fact that the output will later be used to generate a photomask. This can be a problem because mask-writing machines have limitations on the dimensions of shapes they can expose. During conversion of a layout to the mask-writer format, some of the shapes created by the OPC process have to be approximated. This approximation can degrade the quality of correction and may also increase the write time on the mask-writing machine.
In many cases, optical proximity corrections are produced on a finer grid than is used by the mask writer. Thus, the mask writer must approximate the optical proximity corrections on a larger grid. For example, referring to
FIG. 3B
, the system starts with a line
312
in the presence of a neighboring line end
313
. Next, an OPC process performs corrections on line
312
to compensate for the presence of neighboring line end
313
. In doing so, the OPC process first divides line
312
into a number of segments
314
-
316
. Next, biases are applied to the segments
314
-
316
to compensate for the presence of line end
313
. This results in a number of idealized correction features
314
-
316
as is illustrated in FIG.
3
C. However, these idealized correction features
314
-
316
are defined on a grid that is finer than can be produced by the mask writer. Hence, the mask writer approximates the corrections as is illustrated in FIG.
3
D.
Note that the corrected segments all have the same bias. Hence, the three segments
314
-
316
can be represented by a single
figure 317
in the fractured mask data (as is illustrated in FIG.
3
E). This reduces the number of figures that the mask writer has to produce and thereby reduces the mask writing time. Unfortunately, existing OPC systems do not consider mask writer properties and are consequently unable to make such an optimization.
In some cases, optical proximity corrections and other features in the layout may be specified in terms of angles that cannot be produced by a mask writer. For example, a given mask writer may only be able to produce 45-degree and 90-degree angles. Such a mask writer has to approximate other angles (such as the angle represented by line
320
) using 45-degree and 90-degree line edges as is illustrated in FIG.
3
F. Note that this approximation may not be ideal for optical proximity correction purposes. Additionally, the file size may be increased significantly.
What is needed is a method an apparatus for performing optical proximity correction that accounts for mask writer properties.
SUMMARY
One embodiment of the invention provides a system that performs optical proximity correction in a manner that accounts for properties of a mask writer that generates a mask used in printing an integrated circuit. During operation, the system receives an input layout for the integrated circuit. The system also receives a set of mask writer properties that specify how the mask writer prints features. Next, the system performs an optical proximity correction process on the input layout to produce an output layout that includes a set of optical proximity corrections. This optical proximity correction process accounts for the set of mask writer properties in generating the set of optical proximity corrections, so that the mask writer can accurately produce the set of optical proximity corrections.
In a variation on this embodiment, the optical proximity correction process is an iterative process that performs a model-based simulation to adjust the set of optical proximity corrections. In doing so, the system determines whether a result from model-based simulation falls within a pre-defined error budget.
In a variation on this embodiment, the set of mask writer properties are used to constrain the set of optical proximity corrections during the optical proximity process, so that only optical proximity corrections that can be accurately generated by the mask writer are generated by the optical proximity correction process.
In a variation on this embodiment, the optic

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