Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2011-02-22
2011-02-22
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S692000, C257S686000, C257S774000, C257S700000, C257S777000
Reexamination Certificate
active
07893542
ABSTRACT:
The invention provides a connecting structure for a flip-chip semiconductor package in which cracking and delamination are inhibited or reduced to improve reliability, and in which the potential range of designs is expanded for the inner circuitry of circuit boards and the inductance is reduced. The invention is a connecting structure for a flip-chip semiconductor package, including: a circuit board having a core layer and at least one build-up layer; a semiconductor element connected via metal bumps to the circuit board; and a sealing resin composition with which gaps between the semiconductor element and circuit board are filled, wherein a cured product of the sealing resin composition has a glass transition temperature between 60° C. and 150° C. and a coefficient of linear expansion from room temperature to the glass transition temperature being between 15 ppm/° C. and 35 ppm/° C., a cured product of the build-up layer has a the glass transition temperature of at least 170° C. and a coefficient of linear expansion in the in-plane direction up to the glass transition temperature being not more than 40 ppm/° C., and stacked vias are provided in the build-up layer on at least one side of the core layer.
REFERENCES:
patent: 11-233571 (1999-08-01), None
patent: 2001-35960 (2001-02-01), None
patent: 2003-82061 (2003-03-01), None
patent: 2004-71656 (2004-03-01), None
patent: 2004-134679 (2004-04-01), None
patent: 2006-24842 (2006-01-01), None
patent: 2006-316250 (2006-11-01), None
International Search Report.
PCT Notification Concerning Transmittal of international Report on Patentability (Form PCT/IB/326) mailed Oct. 15, 2009.
PCT Notification of Transmittal of Translation of the International Preliminary Examination Report (Form PCT/IB/338) mailed on Oct. 22, 2009.
PCT International Preliminary Report on Patentability (Form PCT/IB/373) issued Oct. 6, 2009 and Oct. 13, 2009.
PCT Written Opinion of the International Searching Authority (Form/ISA/237) mailed on Oct. 22, 2009.
Hatao Takuya
Tachibana Kenya
Wada Masahiro
Pham Long
Smith , Gambrell & Russell, LLP
Sumitomo Bakelite Company Ltd.
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