Conflict-free memory system and method of address...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules

Reexamination Certificate

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C711S200000, C365S230030

Reexamination Certificate

active

06845423

ABSTRACT:
The present invention relates to a memory system, or more particularly to a conflict-free memory system, which can reduce access time to the memory system by supporting simultaneous access to pq units of various data elements of types of 4 directional blocks (pq) and eight directional lines of a constant interval at a location of data within M×N array in a SIMD processor having pq units of PE's (Processing Elements). Accordingly, the present invention is an improvement over the previous memory systems, from the perspective of restriction of subarrary types, constant intervals, and the size of a data array, hardware cost, speed and complexity. Further, it provides a method of address calculation and data routing using said improved conflict-free memory system.

REFERENCES:
patent: 4355376 (1982-10-01), Gould
patent: 4926386 (1990-05-01), Park

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