Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2006-01-31
2006-01-31
Peikari, B. James (Department: 2189)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S057000, C709S209000
Reexamination Certificate
active
06993602
ABSTRACT:
At least one queue parameter for a first process running on a system is determined. A queue management process separate from the first process configures one or more queues on a storage device in accordance with the at least one queue parameter.
REFERENCES:
patent: 6279087 (2001-08-01), Melo et al.
patent: 6359901 (2002-03-01), Todd et al.
patent: 342107 (1989-11-01), None
patent: WO95/18415 (1995-07-01), None
Parker, et al., “Hardware/Software Tradeoffs in a Variable Word Width, Variable Queue Length Buffer Memory”,Proceedings of the 4th Annual Symposium on Computer Architecture, Mar. 1977, pp. 159-164.
Merrill George P.
Zagorianakos Steven W.
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