Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2006-08-08
2006-08-08
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S040000, C365S185330, C365S185290
Reexamination Certificate
active
07088132
ABSTRACT:
The configuration architecture for a programmable device, such as an FPGA, includes one or more memory devices connected directly to the FPGA such that the FPGA can be configured with configuration data stored in the memory devices without transmitting the configuration data via a controller connected between any of the memory devices and the FPGA. In one embodiment, the FPGA has an Serial Peripheral Interface (SPI) that is connected to the SPI interface of each of one or more SPI serial flash PROMs operating as boot PROMs. When there are two or more boot PROMs, each PROM stores a portion of the FPGA's configuration data and the FPGA interleaves the data from multiple boot PROMs to generate a serial configuration data bitstream. The present invention enables boot PROMs having different sizes and/or storing different amounts of configuration data to be simultaneously connected to an FPGA to support efficient configuration architectures.
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Singh Satwant
Tang Howard
Wu Ann
Lattice Semiconductor Corporation
Tan Vibol
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