Configuration of a multi-die integrated circuit

Details Configuration of a multi-die integrated circuit Configuration of a multi-die integrated circuit

2010-06-28

2011-11-15

Ismail, Shawki S (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S037000, C326S041000, C326S047000, C326S101000

Reexamination Certificate

active

08058897

ABSTRACT:
A method of configuring an integrated circuit (IC) can include receiving configuration data within a master die of the IC. The IC can include the master die and a slave die. A master segment and a slave segment of the configuration data can be determined. The slave segment of the configuration data can be distributed to the slave die of the IC.

REFERENCES:
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patent: 2009/0160482 (2009-06-01), Karp et al.
patent: 2009/0161401 (2009-06-01), Bilger et al.
patent: 2010/0157854 (2010-06-01), Anderson et al.
Xilinx, Inc. “Virtex-6 FPGA Configuration User Guide”, UG360 (v2.0) Nov. 15, 2009, pp. 145-156, Chapter 10, www.xilinx.com, Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124 US.
U.S. Appl. No. 12/820,591, filed Jun. 22, 2010, Weiguang Lu et al.

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