Configuration for generating a voltage sense signal in a...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S343000, C257S379000, C257S532000

Reexamination Certificate

active

06914297

ABSTRACT:
The invention relates to a configuration for generating a low-voltage signal proportional to the high voltage present between the source and the drain of a power transistor. For this purpose, a capacitive voltage divider including the source-gate capacitance serving as a low-voltage tap and the source-drain capacitance serving as a high-voltage element is situated in a voltage sense region.

REFERENCES:
patent: 4893158 (1990-01-01), Mihara et al.
patent: 5341003 (1994-08-01), Obinata
patent: 6815798 (2004-11-01), Aiello et al.
patent: 2002/0060340 (2002-05-01), Deboy et al.
patent: 2005/0024925 (2005-02-01), Deboy et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Configuration for generating a voltage sense signal in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Configuration for generating a voltage sense signal in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Configuration for generating a voltage sense signal in a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3430927

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.