Configuration and method of manufacturing the one-time...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S314000, C257S392000, C257S401000, C257S402000, C257S408000

Reexamination Certificate

active

07602029

ABSTRACT:
This invention discloses an one time programmable (OTP) memory. The OTP memory includes a first and a second metal oxide semiconductor (MOS) transistors connected in parallel and controlled by a single polysilicon stripe functioning as a gate wherein the OTP memory further includes a drift region for counter doping a lightly dope drain (LDD) encompassing and surrounding a drain and a source of the first MOS transistor having a different threshold voltage than the second MOS transistor not reached by the drift region. In a preferred embodiment, the first and second MOS transistors are N-MOS transistors disposed in a common P-well and the drift region of the first MOS transistor further comprising a P-drift region.

REFERENCES:
patent: 6740937 (2004-05-01), Sushihara
patent: 2004/0135197 (2004-07-01), Ausserlechner
patent: 2004/0185632 (2004-09-01), Berthold et al.
patent: 2006/0121666 (2006-06-01), Grutzediek et al.

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