Configurable serial interconnection

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C709S234000, C709S235000

Reexamination Certificate

active

06854031

ABSTRACT:
A configurable interconnect for use with high-speed electronic system components. The interconnect uses a lightweight protocol with control characters embedded into the data stream. The control characters define events such as end of packet, end of packet with error, transmit on, transmit off, synchronizing codes, and pass-through status. In one described embodiment, the protocol is used in an internetworking device node in which a pair of high-speed counter rotating rings transport data packets. The high-speed interconnect permits data packets to pass through the node without the delays which might otherwise be experienced with time division multiplex bus structures and the like.

REFERENCES:
patent: 4663706 (1987-05-01), Allen et al.
patent: 4667287 (1987-05-01), Allen et al.
patent: 5020020 (1991-05-01), Pomfret et al.
patent: 5930016 (1999-07-01), Brorson et al.
patent: 6233704 (2001-05-01), Scott et al.

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