Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
1998-10-14
2002-10-15
Wong, Peter (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S306000, C710S308000, C710S309000, C712S010000, C712S015000, C712S029000, C712S031000, C712S036000
Reexamination Certificate
active
06467009
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to integrated circuits, and more specifically, to a configurable processor system unit.
BACKGROUND OF THE INVENTION
Micro-controllers have been around over two decades dating back to the mid 1970's. A micro-controller describes a class of embedded systems. It is usually a single chip device containing a central processing unit, or CPU, custom logic, and an embedded program written in assembly or machine language. The CPU's program and the custom logic embedded within the micro-controller thus tailor its application. A typical calculator for example has a micro-controller specifically designed to interact with a LCD display, numeric keypad, and provide various arithmetic functions. From the inception of the micro-controller device, hundreds of different custom configurations have been designed to address specific applications. The overhead, in terms of time and cost, associated with customizing a micro-controller is significant. Therefore, custom micro-controllers make practical economic sense when large volumes, usually millions of units, are at stake.
An alternative to custom micro-controllers is an Application Specific IC, commonly known as ASIC. An ASIC offers user customization through personalizing the masking layers during the production of the integrated circuit device. Personalization usually comes in two forms: metal only mask, known as Gate-Arrays, and all mask personalization, called Standard Cells. The average ASIC user must overcome numerous obstacles and challenges before an actual product can be realized. Firstly, designing a CPU and associated development tools is a tremendous barrier for most customers. Secondly, the hardware and software expertise, development time, and non-recurring expenses associated with developing such an ASIC is usually much greater than the return. And finally, test and debug costs, manufacturing lead times, and inventory control pose serious challenges to less experienced, cash starved users.
The most economical approach currently available is to adopt a multi-chip embedded system solution by utilizing a Programmable Logic Device, external non-volatile memory, and an off the shelf standard CPU. This is not a single chip solution and is therefore in a different category. However, for the purposes of completeness it is worth noting the problems associated with this approach. Both power consumption and performance are compromised in a multi-chip solution due to excessive I/O pad and board trace capacitance switching. A multi-chip approach does not scale with process technology due to mechanical bonding and packaging issues. Therefore, it does not benefit from process migrations. Time-to-market benefits are better than competing alternatives but not as good as an integrated solution. And finally, a multi-chip solution offers limited and inflexible CPU to logic, and CPU to I/O signal access due to pre-constrained pin assignment.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a configurable processor system on a single integrated circuit.
The configurable processor system includes a processor, an internal system bus, and a programmable logic all interconnected via the internal system bus.
Other objectives, features, and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows below.
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Allegrucci Jean-Didier
Fox Brian
Krishnamurthy Sridhar
Lee Fung Fung
Papaliolios Andreas
Blakely , Sokoloff, Taylor & Zafman LLP
Phan Raymond N
Triscend Corporation
Wong Peter
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