Configurable monolithic semiconductor circuit and method for con

Details Configurable monolithic semiconductor circuit and method for con Configurable monolithic semiconductor circuit and method for con

1996-12-23

1999-04-27

Tokar, Michael

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

326 39, 326 40, 326 41, G06F 738

Patent

active

058983171

ABSTRACT:
A ferroelectric memory array (20) monolithically integrated with a field programmable gate array (32) into a semiconductor circuit (10). The ferroelectric memory array (20) is suitable for a semiconductor manufacturer to program the configuration data that is used in the field programmable gate array (32) prior to shipment and installation in an electronic system. The memory array (20) provides the data that configures the field programmable gate array (32) for functionality of the Configurable Logic Blocks (CLBs) in the field programmable gate array (32). Should the field programmable gate array (32) circuit lose power, the non-volatile memory array (20) provides a shift register (26) with the data to reconfigure the field programmable gate array (32).

REFERENCES:
patent: 5361224 (1994-11-01), Takasu
patent: 5361225 (1994-11-01), Ozawa
patent: 5457410 (1995-10-01), Ting
patent: 5493239 (1996-02-01), Zlotnick
patent: 5606266 (1997-02-01), Pedersen
patent: 5737235 (1998-04-01), Kean et al.

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