Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2003-07-29
2008-12-16
Dang, Khanh (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S302000, C710S306000, C710S311000, C399S301000
Reexamination Certificate
active
07467252
ABSTRACT:
An I/O bus architecture is configurable so that I/O bandwidth may be re-allocated from one I/O slot or device to another. A first intermediate bus couples a system bus interface device to a first I/O bus interface device. A second intermediate bus couples the system bus interface device to a switching device. The switching device functions to couple the second intermediate bus either to the first or to the second I/O bus interface device responsive to a steering signal. The steering signal may be configured to indicate whether or not an I/O device is coupled to the second I/O bus interface device. If so, then the second intermediate bus is coupled to the second I/O bus interface device; but if not, it is coupled to the first I/O bus interface device so that the first I/O bus interface device may utilize the extra I/O bandwidth not being used by the second I/O bus interface device.
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Gay Raphael
Hartman Charles
Daley Christopher A
Dang Khanh
Hart Kevin M.
Hewlett--Packard Development Company, L.P.
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