Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Reexamination Certificate
2008-03-04
2008-03-04
Nguyen, Viet Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
C365S063000, C365S230030, C711S100000
Reexamination Certificate
active
10848997
ABSTRACT:
A configurable processor architecture uses a common simulation database for multiple processor configurations to reduce the cost of producing customized processor configurations. An unchanging core portion is used in each processor configuration. To support different memory modules, identification signals are provided from the memory modules or an identification module to configure the core portion.
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Behrens Dirk
Chesters Eric
Haines Ralph
Oberlaender Klaus J.
Dickstein & Shapiro LLP
Infineon - Technologies AG
Nguyen Viet Q.
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