Configurable cryptographic processing engine and method

Electrical computers and digital processing systems: support – Multiple computer communication using cryptography – Protection at a particular protocol layer

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380 28, 712228, 712229, 712245, 709 1, 709107, 709108, H04K 100

Patent

active

06026490&

ABSTRACT:
A configurable cryptographic processing engine (100) provides high performance cryptographic processing support for symmetric combiner type cryptographic algorithms. As many as two independent cryptographic algorithms may be performed at the same time through the processes of background staging and algorithm multi-tasking. A 3-stage instruction pipeline, dynamically configurable cryptographic co-processor (550), and 32-bit RISC based architecture support high performance cryptographic processing performance on the order of 60 Mbps aggregate throughput.

REFERENCES:
patent: 4887239 (1989-12-01), Turner
patent: 5369314 (1994-11-01), Patel et al.
An Article entitled "CRYPRIS*CrYPtographic Reduced Instruction Set Microprocessor" from Lockheed Martin.

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