Configurable cache for a microprocessor

Details Configurable cache for a microprocessor Configurable cache for a microprocessor

2011-06-21

2011-06-21

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S125000, C711SE12094, C711SE12017, C711S137000

Reexamination Certificate

active

07966457

ABSTRACT:
A cache module for a central processing unit has a cache control unit coupled with a memory, and a cache memory coupled with the control unit and the memory wherein the cache memory has a plurality of cache lines, each cache line having a storage area for storing instructions to be issued sequentially and associated control bits, wherein at least one cache line of the plurality of cache lines has at least one branch trail control bit which when set provides for an automatic locking function of the cache line in case a predefined branch instruction has been issued.

REFERENCES:
patent: 5197139 (1993-03-01), Emma et al.
patent: 5353425 (1994-10-01), Malamy et al.
patent: 5655096 (1997-08-01), Branigin
patent: 5761712 (1998-06-01), Tran et al.
patent: 5848433 (1998-12-01), Tran et al.
patent: 5887152 (1999-03-01), Tran
patent: 6341347 (2002-01-01), Joy et al.
patent: 6532520 (2003-03-01), Dean et al.
patent: 6598128 (2003-07-01), Yoshioka et al.
patent: 6629207 (2003-09-01), Yoshioka et al.
patent: 6957306 (2005-10-01), So et al.
patent: 2002/0116567 (2002-08-01), Vondran, Jr.
patent: 2002/0156962 (2002-10-01), Chopra et al.
patent: 2003/0070047 (2003-04-01), Dwyer et al.
patent: 2005/0235115 (2005-10-01), Franaszek et al.
patent: 2006/0179174 (2006-08-01), Bockhaus et al.
patent: 2008/0052499 (2008-02-01), Koc
patent: 2008/0147990 (2008-06-01), Pesavento et al.
patent: 0 795 820 (1993-02-01), None
patent: 1 729 220 (2006-06-01), None
patent: 01/57675 (2001-08-01), None
International Search Report and Written Opinion; PCT/US2007/087600; pp. 12, Jun. 3, 2008.
Vanderwiel et al., “When Caches Aren't Enough: Data Prefetching Techniques”, Computer, IEEE Service Center, Los Alamitos, CA, US. vol. 30, No. 7., 8 pages, Jul. 1, 1997.
International Search Report and Written Opinion PCT/US2007/087249, 11 pages, Mar. 25, 2008.
International Search Report with Written Opinion PCT/US2007/087238, 14 pages, Jun. 11, 2008.
OSR Staff, “So What is a Page Fault?” http://www.osronline.com/article.efm?article=222 (3 pages), May 6, 2003.

Affiliated with

Also associated with

Rating

Configurable cache for a microprocessor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Configurable cache for a microprocessor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Configurable cache for a microprocessor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2740154