Conductor trace design to reduce common mode cross-talk and...

Details Conductor trace design to reduce common mode cross-talk and... Conductor trace design to reduce common mode cross-talk and...

2008-03-11

2008-03-11

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07343576

ABSTRACT:
A method and apparatus for reducing timing skew between conductor traces. A dielectric medium made of a resin reinforced with a fabric is provided. The fabric includes a first plurality of yarns running parallel to a first axis and a second plurality of yarns running parallel to a second axis. The first plurality of yarns are separated by a first weave pitch and the second plurality of yarns separated by a second weave pitch. At least two conductor traces are formed on the dielectric medium. The conductor traces are positioned on the dielectric medium such that the conductor traces each have substantially similar effective dielectric constants.

REFERENCES:
patent: 6057171 (2000-05-01), Chou et al.
patent: 6291254 (2001-09-01), Chou et al.
patent: 6304700 (2001-10-01), Brand et al.
patent: 6403389 (2002-06-01), Chang et al.
patent: 7022919 (2006-04-01), Brist et al.
patent: 2004/0262036 (2004-12-01), Brist et al.
patent: 2001-354754 (2001-12-01), None
patent: 2004-158354 (2004-06-01), None

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