Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-06-05
1997-07-01
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257321, 257616, 257201, 257192, H01L 29788, H01L 29161, H01L 2934
Patent
active
056441525
ABSTRACT:
A conductive member is described with a surface of controlled roughness thereon which is useful in the construction of an integrated circuit structure. In a preferred embodiment, the conductive member is formed using a mixture of germanium and silicon which is then oxidized, resulting in the formation of a roughened surface on the germanium/silicon conductive member due to the difference in the respective rates of oxidation of the germanium and silicon. After oxidation of the conductive member, the oxide layer may be removed, leaving the toughened surface on the germanium/silicon conductive member. When an integrated circuit structure such as an EPROM is to be formed using this conductive member with a roughened surface, a further layer of oxide is then deposited over the roughened surface followed by deposition of a second layer of conductive material such as polysilicon or a germanium/silicon mixture, from which the control gate will be formed. A further oxide layer may then be formed over the second conductive layer followed by a patterning step to respectively form the floating gate (from the germanium/silicon layer) and the control gate from the second conductive layer.
REFERENCES:
patent: 4442449 (1984-04-01), Lehrer et al.
patent: 4735919 (1988-04-01), Faraone
patent: 4757360 (1988-07-01), Faraone
patent: 4948750 (1990-08-01), Kausche et al.
patent: 4957777 (1990-09-01), Ilderem et al.
patent: 5017505 (1991-05-01), Fujii et al.
patent: 5081066 (1992-01-01), Kim
patent: 5087583 (1992-02-01), Hazani
patent: 5110752 (1992-05-01), Lu
patent: 5182232 (1993-01-01), Chhabra et al.
patent: 5223081 (1993-06-01), Doan
patent: 5238855 (1993-08-01), Gill
patent: 5241193 (1993-08-01), Pfiester et al.
patent: 5250818 (1993-10-01), Saraswat
Selvakumer, et al, IEEE Elec Dev Lett vol. 12, No. 8 Aug. 1991 pp. 444-446 "SiGe . . . Implantation".
Liu, W.S., et al., "Instability of a Ge.sub.x Si.sub.1-x O.sub.2 Film on a Ge.sub.x Si.sub.1-x Layer", Journal of Applied Physics, vol. 72, No. 9, Nov. 1, 1992, pp. 4444-4446.
Wolf, Stanley, et al., Silicon Processing for the VLSI Era, vol. 1: Process Technology, Sunset Beach, California: Lattice Press, 1986, 303-308.
Kapoor Ashok
Rostoker Michael D.
Jackson Jerome
LSI Logic Corporation
Taylor John P.
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