Conductive diffusion barrier layer, semiconductor device...

Details Conductive diffusion barrier layer, semiconductor device... Conductive diffusion barrier layer, semiconductor device...

1998-09-18

2001-01-23

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

C438S003000

Reexamination Certificate

active

06177284

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a conductive diffusion barrier layer and a manufacturing method thereof.
2. Description of the Related Art
In general, an integrated circuit in a semiconductor device includes circuit patterns formed of various materials. The material for forming the circuit patterns contains conductive materials such as aluminum (Al), platinum (Pt), copper (Cu), and wolfram (W), an insulating material such as a silicon oxide, and a conductive semiconductor material such as conductive silicon doped with an impurity. The circuit patterns formed of the above-listed materials are electrically connected to form a circuit. A conductive diffusion barrier layer is required for preventing movement of materials between the circuit patterns. The diffusion barrier layer is formed of TiN, TaN, TiSiN, or TaSiN. The diffusion barrier layer requires characteristics of high conduction stability, high diffusion suppressibility, and high oxidation resistance during subsequent thermal processes.
The diffusion barrier layer may be used for forming a capacitor on a semiconductor substrate. The diffusion barrier layer is formed at an interface between an electrode of the capacitor and a doped silicon layer. The diffusion barrier layer of the capacitor separates the electrode from the doped silicon layer thereby preventing materials from moving and diffusing. For example, in the capacitor using a dielectric layer such as a nitride/oxide (NO) layer or a Ta
2
O
5
layer, the TiN, or TaN layer is used for the diffusion barrier layer.
As the semiconductor device becomes more highly integrated, a layout area occupied by the capacitor should be reduced, while the capacitance should increase. Accordingly, the dielectric layer formed of a high dielectric material such as BST (Ba(Sr, Ti))O
3
or PZT (Pb(Zr, Ti))O
3
is required for ensuring the capacitance. The dielectric layer has a dielectric constant approximately a hundred times higher than that of the conventional NO layer. Also, the process for forming the capacitor is simplified and the step coverage around the capacitor is improved.
The dielectric layer contains oxygen (O) atoms and is formed through annealing at an oxidation ambient gas. Thus, the electrode of the capacitor requires a conductive material such as Pt having good oxidation resistance and stability at high temperatures. However, the platinum reacts easily with the silicon of the silicon layer contacting the electrode. Thus, the diffusion barrier layer must be formed at an interface between the electrode and the silicon layer.
Meanwhile, the dielectric layer such as the BST layer or the PZT layer is formed through annealing at the oxidation ambient gas. Accordingly, the diffusion barrier layer contacting with the electrode of the capacitor, i.e., a Pt electrode and the silicon layer may be oxidized. That is, an oxide layer may be formed between the diffusion barrier layer and the silicon layer due to the oxidation ambient gas. Also, the diffusion barrier layer or the silicon layer may be oxidized thereby increasing the resistance of the interface thereof. The increase in resistance of the interface causes an unwanted reduction in the capacitance.
The oxygen diffused from the oxidation ambient gas used for forming the dielectric layer causes oxidation of the silicon layer. Therefore, in order to prevent the diffusion and movement of the oxygen, the diffusion barrier layer is preferably stable during oxidation and resists oxidation, particularly at high temperatures.
However, the diffusion barrier layer formed of TiN when exposed to the oxidation ambient gas, forms a nonconductive layer, such as a TiO
2
layer, when exposed to the oxidation ambient gas. The TiO
2
layer increases the resistance between the silicon layer and the electrode. Therefore, the diffusion barrier layer requires characteristics of stable oxidation resistance and conductivity at high temperatures thereby preventing diffusion of metal, silicon, and oxygen atoms.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device having a diffusion barrier layer that overcomes the problems associated with prior art semiconductor devices.
It is another object of the present invention to provide a semiconductor device having a conductive diffusion barrier layer that prevents diffusion of materials.
It is yet another object of the present invention to provide a semiconductor device having a conductive diffusion barrier layer that resists oxidation, particularly at high temperatures.
It is yet another object of the present invention to provide a capacitor for a semiconductor device having a conductive diffusion barrier layer that prevents diffusion of materials and resists oxidation at high temperatures.
It is yet another object of the present invention to provide a method for manufacturing a capacitor for a semiconductor device having a conductive diffusion barrier layer that prevents diffusion of materials and resists oxidation at high temperatures.
Accordingly, the present invention provides a semiconductor device comprising a diffusion barrier layer comprising of Al, N, and a metal element selected from the group consisting of Ta, Mo, Nb, and W and a conductive layer formed adjacent to the diffusion barrier layer. The content ratio of each of the Al, N, and the selected metal element in the diffusion barrier layer is between 1 and 60 mole percent. The diffusion barrier layer may further comprise O with an atomic concentration between 1 and 50 mole percent. The conductive layer is formed of Pt, Rh, Ru, Ir, Os, Pd, PtO
x
, RhO
x
, OsO
x
, PdO
x
, CaRuO
3
, SrRuO
3
, CaIrO
3
, SrIrO
3
, Cu, Al, Ta, Wsi
x
, Mo, MoSi
x
, W, Au, TiN, or TaN.
The present invention provides a capacitor for a semiconductor memory device comprising an insulating layer pattern formed on a semiconductor substrate having a contact hole. A diffusion barrier layer pattern is electrically connected to the semiconductor substrate through the contact hole, the diffusion barrier layer comprises Al, N, and a metal element selected from the group consisting of Ta, Mo, Nb, and W. A storage node is formed on the diffusion barrier layer pattern and a dielectric layer is formed on the storage node. A plate node is formed on the dielectric layer. The capacitor further comprises a conductive plug inserted into the contact hole under the diffusion barrier layer pattern. The conductive plug is formed of a conductive material selected from the group consisting of Si, W, and a combination thereof. The storage and plate nodes comprise a conductive material selected from the group consisting of Pt, Rh, Ru, Ir, Os, Pd, PtO
x
, RhO
x
, OsO
x
, PdO
x
, CaRuO
3
, SrRuO
3
, CaIrO
3
, SrIrO
3
, Cu, Al, Ta, Wsi
x
, Mo, MoSi
x
, W, Au, TiN, and TaN. The content ratio of Al, N, and the selected metal element in the diffusion barrier layer is preferably between 1 and 60 mole percent. The diffusion barrier layer further comprises O with an atomic concentration between 1 and 50 mole percent. The dielectric layer comprises a dielectric material selected from the group consisting of Ta
2
O
5
, SrTiO
3
, Ba(Sr, Ti)O
3
, Pb(Zr, Ti)O
3
, SrBi
2
Ta
2
O
9
, (Pb, La)(Zr, Ti)O
3
, and Bi
4
Ti
3
O
12
.
The present invention provides a method for manufacturing a capacitor for a semiconductor device comprising forming an insulating layer pattern having a contact hole on a semiconductor substrate and forming a diffusion barrier layer electrically connected to the semiconductor substrate through the contact hole. The diffusion barrier layer comprises Al, N, and a metal element selected from the metal group consisting of Ta, Mo, Nb, and W. The method comprises forming a storage node layer on the diffusion barrier layer, patterning the storage node layer and the diffusion barrier layer to form a storage node and a diffusion barrier layer pattern. The method further comprises forming a dielectric layer on the storage

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