Conditional invert functions in precharged circuits

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

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Details

326119, 326 98, H03K 1900

Patent

active

061408433

ABSTRACT:
The present invention provides a data processing apparatus comprising a precharged circuit having at least one input line arranged to be precharged to a first logic value during a precharge phase, and a conditional-invert circuit connected to a first at least one input line and arranged to provide a first data value or the inverted first data value on the first input line during an active phase following the precharge phase. The conditional-invert circuit comprises a signal line coupled to the first input line and arranged to be precharged to a predetermined logic value during the precharge phase, a first set of logic gates connected between the signal line and a predetermined voltage, and being arranged upon receipt of a select signal to cause the first data value to be provided on the first input line, and a second set of logic gates connected between the signal line and the predetermined voltage, and being arranged upon receipt of a select signal to cause the inverted first data value to be provided on the first input line. In the active phase, either the first set of logic gates or the second set of logic gates is arranged to receive the select signal. In accordance with the present invention, the speed benefits of using a precharged circuit as opposed to a non-precharged circuit can be realised in circuitry that also requires a conditional-invert function.

REFERENCES:
patent: 5208490 (1993-05-01), Yetter
patent: 5291076 (1994-03-01), Bridges et al.
patent: 5825208 (1998-10-01), Levy et al.

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