Conditional execution using an efficient processor flag

Details Conditional execution using an efficient processor flag Conditional execution using an efficient processor flag

2004-06-16

2009-08-25

Chan, Eddie P (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

Reexamination Certificate

active

07581088

ABSTRACT:
Methods and apparatus are provided for optimizing a conditional execution on a processor core. A processor sets a flag based on both the result and the type of an instruction. The flag is used during evaluation of a subsequent instruction to determine if the subsequent instruction should be executed. A semantically overloaded flag can be used to efficiently handle chained logical comparisons.

REFERENCES:
patent: 6009512 (1999-12-01), Christie
patent: 6157996 (2000-12-01), Christie et al.
patent: 6928645 (2005-08-01), Wang et al.
patent: 2003/0061471 (2003-03-01), Matsuo
80×86 instruction set found at http://www.penguin.cz/˜literak/intel/intel.html.
Cheung et al., “Predicated Instructions for Code Compaction”, Department of Computer Science.

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