Conditional execution of floating point store instruction by...

Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing

Reexamination Certificate

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C712S225000

Reexamination Certificate

active

07945766

ABSTRACT:
A processor capable of executing conditional store instructions without being limited by the number of condition codes is provided. Condition data is stored in floating-point registers, and an operation unit executes a conditional floating-point store instruction of determining whether to store, in cache, store data.

REFERENCES:
patent: 5070451 (1991-12-01), Moore et al.
patent: 5319757 (1994-06-01), Moore et al.
patent: 5889984 (1999-03-01), Mills
patent: 6049860 (2000-04-01), Krygowski et al.
patent: 6112019 (2000-08-01), Chamdani et al.
patent: 6393555 (2002-05-01), Meier et al.
patent: 6425074 (2002-07-01), Meier et al.
patent: 6714197 (2004-03-01), Thekkath et al.
patent: 7-31603 (1995-04-01), None
patent: 7-210398 (1995-08-01), None
patent: 8-106416 (1996-04-01), None
patent: 11-73314 (1999-03-01), None
patent: 11-184750 (1999-07-01), None
patent: 11-316680 (1999-11-01), None
patent: 2000-105699 (2000-04-01), None
patent: 2003-519835 (2003-06-01), None
patent: 3570188 (2004-09-01), None
patent: 2005-516432 (2005-06-01), None
patent: 3657949 (2005-06-01), None
patent: 3787142 (2006-06-01), None
European Search Report issued on Jan. 22, 2009 in corresponding European Patent Application 08168555.4.
Gupta, “A Fine-Grained Mimd Architecture based upon Register Channels”, Microprogramming and Microarchitecture. Micro 23. Proceedings of the 23RD Annual Workshop and Symposium, Workshop on Orlando, FL, Nov. 27-29, 1990, Los Alamitos, CA, USA, IEEE Comput. SOC, XP010022259, Nov. 27, 1990, pp. 28-37.

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