Conditional back-to-back interrupt vectoring

Details Conditional back-to-back interrupt vectoring Conditional back-to-back interrupt vectoring

2005-11-11

2011-11-01

Knoll, Clifford (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

Handling vector

C712S220000

Reexamination Certificate

active

08051235

ABSTRACT:
Upon execution of an interrupt return (IRET) instruction when a second interrupt is pending, rather than popping a stack, obtaining processor state information, and then pushing the state information back onto the stack prior to vectoring off to a second interrupt service routine, direct vectoring is employed such that the stack is not pushed or popped but rather the processor vectors directly from the IRET instruction in the first interrupt service routine to the second interrupt service routine. A novel stored interrupt enable (SIE) bit stores whether maskable interrupts were enabled at the time the first interrupt service routine was entered. Execution of IRET automatically checks the SIE. If the SIE indicates interrupts were enabled, then direct vectoring occurs. If the SIE indicates that interrupts were disabled, then the second interrupt remains pending, and an interrupt return operation is performed by popping the stack and restoring the prior processor state.

REFERENCES:
patent: 5640548 (1997-06-01), Langan et al.
patent: 7185159 (2007-02-01), Beinet et al.
patent: 2004/0215860 (2004-10-01), Armstrong et al.
MC68HC11 Reference Manual, M68HC11RM/D, Rev. 6, Apr. 2002, 650 pp., p. 31 (http://www.freescale.com/files/microcontrollers/doc/ref—manual/M68HC11RM.pdf, accessed Mar. 30, 2007).
MC68HC11 Reference Manual, M68HC11RM/D, Rev. 6, Apr. 2002, 650pp, pp. 1,180, 190-191 (http://www.freescale.com/files/microcontrollers/doc/ref—manual/M68HC11RM.pdf, accessed Aug. 29, 2007).
Presentation Slides, “ARM in MCU” at Zilog Aug. 19, 2004, by John Sharp ARM MCU Segment Manager, ARM Holdings plc, 31 pages.

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