Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2004-11-10
2009-10-06
Kindred, Alford W (Department: 2181)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S239000
Reexamination Certificate
active
07600102
ABSTRACT:
A processing pipeline with a plurality of pipeline stages is described, with the processing pipeline comprising a front end and a back end. The processing pipeline's front end comprises an array for storing at least two condition bits, the condition bits being adapted for indicating respective conditions. The front end is adapted for resolving conditional branch instructions by accessing the array of condition bits whenever a conditional branch instruction occurs, the respective branch instruction being resolved in accordance with a corresponding condition bit. In another embodiment, the condition bits are combined with predicated execution of instructions, with the instruction's predicates being evaluated at the processing pipeline's back end.
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Broadcom Corporation
Geib Benjamin P
Kindred Alford W
Sterne Kessler Goldstein & Fox PLLC
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