Condensed single block PLA plus PAL architecture

Details Condensed single block PLA plus PAL architecture Condensed single block PLA plus PAL architecture

1996-03-28

1997-11-04

Hudspeth, David R.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 47, H03K 19177

Patent

active

056844131

ABSTRACT:
A condensed single block PAL plus PLA architecture utilizing a rectangular shape is shown. By interleaving the ORterms of the PLA array with the Pterms of the PAL array, a significant amount of die space is saved when incorporating the circuit with silicon. The decode routing required is now simplified and the propagation delay skews through the array are also reduced.

REFERENCES:
patent: Re34444 (1993-11-01), Kaplinsky
patent: 5235221 (1993-08-01), Douglas et al.
patent: 5471155 (1995-11-01), Steele

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