Condensed single block PLA plus PAL architecture

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 41, H03K 19177

Patent

active

058894128

ABSTRACT:
A condensed single block PAL plus PLA architecture utilizing a rectangular shape is shown. By interleaving the ORterms of the PLA array with the Pterms of the PAL array, a significant amount of die space is saved when incorporating the circuit with silicon. The decode routing required is now simplified and the propagation delay skews through the array are also reduced.

REFERENCES:
patent: 4140967 (1979-02-01), Balsubramanian et al.
patent: 4506341 (1985-03-01), Kalter et al.
patent: 5081375 (1992-01-01), Pickett et al.
patent: 5309046 (1994-05-01), Steele
patent: 5684413 (1997-11-01), Shimanek et al.

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