Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-12-11
2007-12-11
Kim, Hong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S144000, C711S145000, C711S147000, C711S150000, C711S168000, C710S106000
Reexamination Certificate
active
11016218
ABSTRACT:
Concurrent read access and exclusive write access are provided in a shared memory architecture to permit one or more devices in the shared memory architecture to maintain read access to a block of memory such as a cache line while one device has exclusive permission to modify that block of memory. By doing so, a device that has permission to modify may make updates to its copy of the block of memory without invalidating other copies of the block of memory, and potentially enabling other devices to continue to read data from their respective copies of the block of memory without having to retrieve the updated copy of the block of memory.
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Fuhs Ronald Edward
Haraden Ryan Scott
Sellin Nathaniel Paul
Willenborg Scott Michael
Ayash Marwan
International Business Machines - Corporation
Kim Hong
Wood Herron & Evans LLP
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