Concurrent maintenance for PCI based DASD subsystem with...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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C710S100000, C710S108000, C710S110000, C713S300000, C713S340000

Reexamination Certificate

active

06199130

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the field of computer system maintenance, and in particular, to concurrent maintenance of peripheral component interconnect (PCI) based direct access storage devices (DASD's, i.e., disk drives).
2. Background Information
Typical medium to large size computer systems include at least one backplane, which is essentially a connecting board having integrated wiring and bus slots or other connectors, for interconnecting various computer system circuits designed to connect to the backplane. The backplanes are used to connect input-output (I/O) circuits, also commonly referred to as adapters or controller cards, for use in interfacing peripheral devices, for example, direct access storage devices (DASD's, e.g., hard disk drives), to the rest of the computer system. These I/O circuits are generally disposed on modules or cards which have standard connectors for plug-in to the backplane at bus sockets or slots. This allows for easy maintenance including removal, servicing, upgrading and replacement by service personnel.
Typically an interface circuit card is used to couple a DASD parallel or serial input/output bus to the computer system bus via the backplane. In some systems, there may be one or more backplanes and/or enclosures dedicated to DASD's, and these are referred to herein as DASD backplanes and DASD towers, respectively. An example of such a system is the IBM AS/400 (IBM and AS/400 are registered trademarks of International Business Machines Corporation).
An AS/400 computer system, for example, in its multi-tower configuration, includes towers interconnected by at least one host system bus, and also interconnected by a control network called the system power control network (SPCN). A known system power control network (SPCN) is disclosed in U.S. Pat. No. 5,117,430, for example. The SPCN is a low volume serial network used, for instance, to monitor power conditions at a plurality of interconnected nodes in a multi-tower computer system.
Improvements in the SPCN are disclosed in co-pending application Ser. No. 08/912,561 (attorney docket RO997-083-IBM-101), Ser. No. 08/912,403 (attorney docket RO997-084-IBM-102) and Ser. No. 08/912,402 (attorney docket RO997-085-IBM-103), for example.
The SPCN may include one or more microprocessors which are operational to, for example, monitor the status of, and make occasional adjustments to, the power conditions at the respective computer system nodes. At system start-up or “initial program load” (IPL), the SPCN microprocessors gather computer system configuration information ahead of and independently of the computer system main communication paths.
Also known is a method and apparatus for correlating the physical locations of system components with their corresponding logical addresses using an SPCN, disclosed in Ser. No. 08/971,687 (attorney docket number RO997-154-IBM-108).
There are a variety of standard bus types and associated slot connectors currently in use in computer system backplanes, including serial and parallel versions of SCSI (Small Computer System Interconnect), and the currently popular PCI (Peripheral Component Interconnect), for example. Where a backplane includes primarily PCI type (slot) connections, it will be referred to herein as a PCI backplane. A PCI backplane has a host PCI bus integrated on the backplane, and includes at least one PCI bridge circuit (PCIB) which couples the local PCI slot connections thereon to the computer system host bus, and to any other local PCI buses/connections present, thereby “bridging” the buses. The computer system host bus could also be a PCI bus or another type of bus. It is possible for an SCSI-based I/O controller, which couples to a peripheral device over an SCSI bus, to be disposed on a card configured to plug-in to a PCI slot on a PCI backplane.
DASD's typically connect directly to either a serial or a parallel SCSI I/O bus. One possible DASD system configuration, therefore, includes one or more DASD's connected by an SCSI bus to an SCSI DASD I/O card, which is plugged into a PCI slot on a PCI backplane of an AS/400 computer system. This type of DASD configuration will be referred to as a PCI-based DASD configuration or subsystem herein.
In mid-range to high-end computer systems, such as the AS/400, it is highly advantageous to be able to perform a number of maintenance operations on the system while the system is still running, and these operations are referred to as concurrent maintenance (CM) operations. In particular, failed or failing DASD's (and related circuits) should be replaceable in a concurrent maintenance operation, but to do so requires the SCSI bus to be quiesced while the DASD device is powered down and removed, and a replacement reinstalled and powered on, in order to prevent errors and voltage transients that may affect other devices.
However, there is a need for a new method for accomplishing DASD concurrent maintenance with the afore-mentioned PCI-based DASD configurations because the methods used with prior configurations are generally inapplicable, impractical and/or too expensive as will now be explained.
The presently methodology of DASD concurrent maintenance employed, for example, in some versions of the AS/400 computer system, uses a proprietary communication protocol and connection “IOPSCAN” between SPCN and each of several input-output adapters in a I/O subsystem structure. However, this prior method will not work effectively in PCI-based DASD subsystems for the following reasons. In the IOPSCAN method, for a typical 14-slot PCI backplane, where an SCSI DASD controller card can plug into any slot, one IOPSCAN signal line per slot, or 14 signal lines are required. However, this requirement for IOPSCAN lines raises a non-compliance issue with the industry standard PCI bus connector, where all the connector pins are already defined. Compliance with the industry standard is, of course, a desirable design goal affecting compatibility with third-party products, for example.
In another solution to the problem, the American National Standard for Information Systems SCSI standard for Enclosure Services (ANSI's SES) identifies the use and connection of an SES microprocessor to the SCSI bus. The ANSI-SES specifies that the SCSI bus must download inclosure information and services to an SES processor on the SCSI bus. One of the possible uses identified is to issue commands through the SCSI bus (using SCSI Diagnostic Mode Pages) to the SES processor, directing some 10 pins on the processor to turn on/off FET's or regulators on a DASD backplane to power on/off the DASD for concurrent maintenance (CM) activities.
There is also an ANSI standard called SCSI Power Management, which identifies various SCSI commands that can be used to control various aspects of power consumed by a DASD, and includes the concept of powering the DASD completely on and off.
However, the above-mentioned ANSI solutions have some drawbacks and limitations which make them significantly less than optimal solutions. For example, it is possible that the reason for needing a DASD maintenance action may be that the SCSI bus itself is inoperative. Since the above ANSI solutions make use of the SCSI bus for signaling and control, they may not be able to effectively and efficiently handle concurrent maintenance in the situation where the SCSI bus is causing the fault.
Additionally, one SES processor is required for each SCSI bus, so that costs disadvantageously increase substantially with each SCSI bus added.
Therefore, a need exists for a way to implement concurrent maintenance in a PCI-based DASD subsystem which avoids the above drawbacks and limitations. A need exists for a way to implement DASD concurrent maintenance operations using existing and future PCI bridge structures, intelligent I/O adapters, and provide generally, system enclosure service type processes.
SUMMARY OF THE INVENTION
It is, therefore, a principal object of this invention to provide a method and apparatus

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