Concurrent hardware-software co-synthesis of hard real-time aper

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

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716 2, 716 4, 716 7, 716 8, 709102, 709103, 709104, 709105, 709106, G06F 1750

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061102202

ABSTRACT:
Hardware-software co-synthesis of an embedded system requires mapping of its specifications into hardware and software modules such that its real-time and other constraints are met. Embedded system specifications are generally represented by acyclic task graphs. Many embedded system applications are characterized by aperiodic as well as periodic task graphs. Aperiodic task graphs can arrive for execution at any time and their resource requirements vary depending on how their constituent tasks and edges are allocated. Traditional approaches based on a fixed architecture coupled with slack stealing and/or on-line determination of how to serve aperiodic task graphs are not suitable for embedded systems with hard real-time constraints, since they cannot guarantee that such constraints would always be met. The present invention addresses the problem of concurrent co-synthesis of aperiodic and periodic specifications of embedded systems. The algorithm estimates the resource requirements of aperiodic task graphs and allocates execution slots on processing elements and communication links for executing them. The present approach guarantees that the deadlines of both aperiodic and periodic task graphs are always met. Simultaneous consideration of aperiodic task graphs while performing co-synthesis of periodic task graphs is vital for achieving superior results compared to the traditional slack stealing and dynamic scheduling approaches. This is the first co-synthesis algorithm that provides simultaneous support of periodic and aperiodic task graphs with hard real-time constraints. Application of the proposed algorithm to several examples from real-life telecom transport systems shows that up to 28% and 34% system cost savings are possible over co-synthesis algorithms which employ slack stealing and rate-monotonic scheduling, respectively.

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