Concurrent execution of critical sections by eliding...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

Reexamination Certificate

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C711SE12094, C711SE12037

Reexamination Certificate

active

07962699

ABSTRACT:
One embodiment of the present invention provides a system that facilitates avoiding locks by speculatively executing critical sections of code. During operation, the system allows a process to speculatively execute a critical section of code within a program without first acquiring a lock associated with the critical section. If the process subsequently completes the critical section without encountering an interfering data access from another process, the system commits changes made during the speculative execution, and resumes normal non-speculative execution of the program past the critical section. Otherwise, if an interfering data access from another process is encountered during execution of the critical section, the system discards changes made during the speculative execution, and attempts to re-execute the critical section.

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patent: 2003/0014602 (2003-01-01), Shibayama et al.
patent: 2003/0208673 (2003-11-01), Chaudhry et al.

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